A multirate transceiver IC for four-wire full-duplex data transmission

Author

Buttle, Ken ; Takatori, Hiroshi ; Shih, Cheng-Chung ; Shafir, Haim

Author_Institution

Level One Commun., Inc., Folsom, CA, USA

Volume

26

Issue

12

fYear

1991

fDate

12/1/1991 12:00:00 AM

Firstpage

1928

Lastpage

1935

Abstract

A CMOS IC transceiver for full-duplex data transmission at 14 data rates is described. At the highest rate of 72 kb/s, two of these chips communicate on a four-wire twisted-pair telephone loop with loss at 36 kHz of up to 48 dB. The chip performs all line driving, timing recovery, and data recovery functions with only 11 passive external line interface components. The transceiver can converge on all digital data service (DDS) lines. sending and receiving unscrambled data without the need for a training sequence. The chip was fabricated in a 2-μm, double-polysilicon, double-metal process with an area of 49 mm². Power consumption is 200 mW from the single 5-V supply

Keywords

CMOS integrated circuits; data communication equipment; digital signal processing chips; subscriber loops; transceivers; 11 passive external line interface components; 2 micron; 200 mW; 36 kHz; 48 dB; 5 V; 72 kbit/s; CMOS; chip area; data rates; data recovery functions; digital data service; double-metal process; double-polysilicon; four-wire full-duplex data transmission; four-wire twisted-pair telephone loop; line driving; multirate transceiver IC; power consumption; timing recovery; unscrambled data; CMOS digital integrated circuits; CMOS integrated circuits; Data communication; Decision feedback equalizers; Digital circuits; Digital filters; Energy consumption; Telephony; Timing; Transceivers;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.104186

Filename

104186