DocumentCode
844598
Title
Strained ultrahigh performance fully depleted nMOSFETs with ft of 330 GHz and sub-30-nm gate lengths
Author
Singh, D.V. ; Jenkins, K.A. ; Sleight, J. ; Ren, Z. ; Ieong, M. ; Haensch, W.
Author_Institution
IBM T. J. Watson Res. Center, IBM Semicond. R&D Center, Yorktown Heights, NY, USA
Volume
27
Issue
3
fYear
2006
fDate
3/1/2006 12:00:00 AM
Firstpage
191
Lastpage
193
Abstract
Ultrahigh performance fully depleted nMOSFETs have been fabricated on ultra-thin silicon-on-insulator (UTSOI) with a body thickness of 18 nm and channel lengths down to 20 nm. Uniaxial tensile stress induced in the channel using stressed contact liners and stress memorization was found to significantly improve ac performance, resulting in cutoff frequencies ft as high as 330 GHz. This is the highest fT value reported on fully depleted UTSOI MOSFETs and is among the highest fT values for any Si-based field-effect transistor. Stress memorization and stressed contact liners were found to have little impact on gate to source capacitance indicating that the enhancement in fT results primarily from stress-induced enhancements in transconductance.
Keywords
MOSFET; internal stresses; nanoelectronics; silicon-on-insulator; 18 nm; 20 nm; 330 GHz; Si; UTSOI MOSFET; fully depleted field-effect transistor; gate-source capacitance; nMOSFET; strained ultrahigh performance field-effect transistor; stress memorization; stressed contact liners; transconductance; ultra-thin silicon-on-insulator; uniaxial tensile stress; Cutoff frequency; Electron mobility; FETs; Implants; MOSFETs; Parasitic capacitance; Research and development; Silicon on insulator technology; Tensile stress; Transconductance; Fully depleted (FD); MOSFET; high frequency; silicon-on-insulator (SOI); stress liner; stress memorization; ultrathin body;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2006.870254
Filename
1599476
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