• DocumentCode
    864712
  • Title

    Publicly detectable watermarking for intellectual property authentication in VLSI design

  • Author

    Qu, Gang

  • Author_Institution
    Electr. & Comput. Eng. Dept., Maryland Univ., College Park, MD, USA
  • Volume
    21
  • Issue
    11
  • fYear
    2002
  • fDate
    11/1/2002 12:00:00 AM
  • Firstpage
    1363
  • Lastpage
    1368
  • Abstract
    Highlighted with the newly released intellectual property (IP) protection white paper by VSI Alliance, the protection of virtual components or IPs in very large scale integration (VLSI) design has received a great deal of attention recently. Digital signature/watermark is one of the most promising solutions among the known protection mechanisms. It provides desirable proof of authorship without rendering the IP useless. However, it makes the watermark detection, which is as important as watermarking, an NP-hard problem. In fact, the tradeoff between hard-to-attack and easy-to-detect and the lack of efficient detection schemes are the major obstacles for digital signatures to thrive. In this paper, the authors propose a new watermarking method which allows the watermark to be publicly detected without losing its strength and security. The basic idea is to create a cryptographically strong pseudo-random watermark, embed it into the original problem as a special (which the authors call mutual exclusive) constraint, and make it public. The authors combine data-integrity technique and the unique characteristics in the design of VLSI IPs such that adversaries will not gain any advantage from the public watermarking for forgery. This new technique is compatible with the existing constraint-based watermarking/fingerprinting techniques. The resulting public-private watermark maintains the strength of a watermark and provides easy detectability with little design overhead. The authors build the mathematical framework for this approach based on the concept of mutual exclusive constraints. They use popular VLSI CAD problems, namely technology mapping, partitioning, graph coloring, FPGA design, and Boolean satisfiability, to demonstrate the public watermark´s easy detectability, high credibility, low design overhead, and robustness.
  • Keywords
    VLSI; circuit CAD; computability; cryptography; data integrity; field programmable gate arrays; graph colouring; industrial property; integrated circuit design; logic CAD; message authentication; watermarking; Boolean satisfiability; CAD problems; FPGA design; NP-hard problem; VLSI design; VSI Alliance; cryptographically strong pseudorandom watermark; data-integrity technique; design-for-reuse; desirable proof of authorship; digital signatures; easy-to-detect; graph coloring; hard-to-attack; high credibility; intellectual property authentication; intellectual property protection; low design overhead; mutual exclusive; partitioning; public-private watermark; publicly detectable watermarking; robustness; technology mapping; virtual components; Authentication; Cryptography; Data security; Digital signatures; Forgery; Intellectual property; NP-hard problem; Protection; Very large scale integration; Watermarking;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2002.804205
  • Filename
    1047055