• DocumentCode
    86543
  • Title

    A Cluster-Based Distributed Active Current Sensing Circuit for Hardware Trojan Detection

  • Author

    Yuan Cao ; Chip-Hong Chang ; Shoushun Chen

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    9
  • Issue
    12
  • fYear
    2014
  • fDate
    Dec. 2014
  • Firstpage
    2220
  • Lastpage
    2231
  • Abstract
    The globalization of integrated circuits (ICs) design and fabrication has given rise to severe concerns on the devastating impact of subverted chip supply. Hardware Trojan (HT) is among the most dangerous threats to defend. The dormant circuit inserted stealthily into the chip by the advisory could steal the confidential information or paralyze the system connected to the subverted chip upon the HT activation. This paper presents a transient power supply current sensor to facilitate the screening of an IC for HT infection. Based on the power gating scheme, it converts the current activity on local power grid into a timing pulse from which the timing and power-related side channel signals can be externally monitored by the existing scan test architecture. Its current comparator threshold can be calibrated against the quiescent current noise floor to reduce the impacts of process variations. Postlayout statistical simulations of process variations are performed on the ISCAS´85 benchmark circuits to demonstrate the effectiveness of the proposed technique for the detection of delay-invariant and rarely switched HTs. Compared with the detection error rate of a 4-bit counter-based HT reported by an existing HT detection method using the path delay fingerprint, our method shows an order of magnitude improvement in the detection accuracy.
  • Keywords
    circuit simulation; comparators (circuits); electronic engineering computing; integrated circuit design; integrated circuit noise; invasive software; microprocessor chips; power grids; sensors; statistical analysis; HT activation; HT detection method; HT infection screening; IC design; IC fabrication; cluster-based distributed active current sensing circuit; comparator threshold; delay-invariant HT; detection accuracy; detection error rate; dormant circuit; globalization; hardware Trojan detection; integrated circuits design; local power grid; magnitude improvement; path delay fingerprint; postlayout statistical simulations; power gating scheme; power-related side channel signals; process variations; quiescent current noise floor; scan test architecture; subverted chip supply; switched HT; threats; timing pulse; transient power supply current sensor; Detectors; Security; Trojan horses; Hardware Trojan; current monitor; power gating; process variation; side-channel analysis;
  • fLanguage
    English
  • Journal_Title
    Information Forensics and Security, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1556-6013
  • Type

    jour

  • DOI
    10.1109/TIFS.2014.2360432
  • Filename
    6910295