• DocumentCode
    865970
  • Title

    Modified Booth modulo 2n-1 multipliers

  • Author

    Efstathiou, C. ; Vergos, H.T. ; Nikolos, D.

  • Author_Institution
    Informatics Dept., TEI, Athens, Greece
  • Volume
    53
  • Issue
    3
  • fYear
    2004
  • fDate
    3/1/2004 12:00:00 AM
  • Firstpage
    370
  • Lastpage
    374
  • Abstract
    2n-1 is one of the most commonly used moduli in residue number systems. In this paper, we propose a new method for designing modified Booth modulo 2n-1 multipliers, which, for even values of n, require one less partial product than the already known. CMOS implementations reveal that the proposed multipliers compared to earlier solutions offer savings up to 28.7 percent and up to 29.3 percent in the implementation area and execution delay, respectively.
  • Keywords
    VLSI; logic design; multiplying circuits; residue number systems; Booth modulo design; CMOS implementation; Mersenne arithmetic; VLSI design; multiplier; residue number system; Electronic mail; Hardware; Informatics;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2004.1261842
  • Filename
    1261842
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=865970