DocumentCode
868221
Title
0.8 V CMOS adiabatic differential switch logic circuit using bootstrap technique for low-voltage low-power VLSI
Author
Zhang, Y. ; Chen, H.H. ; Kuo, J.B.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume
38
Issue
24
fYear
2002
fDate
11/21/2002 12:00:00 AM
Firstpage
1497
Lastpage
1499
Abstract
A novel 0.8 V CMOS adiabatic differential switch logic (ADSL) circuit using the bootstrap technique for low-voltage low-power VLSI is reported. Using capacitance coupling effects from the bootstrap transistors with the related isolating transistors, this 0.8 VADSL circuit has a 52% smaller propagation delay time, consuming 26% less power as compared to the energy efficient logic circuit.
Keywords
CMOS logic circuits; VLSI; capacitance; delays; low-power electronics; 0.8 V; CMOS ADSL circuit; CMOS VLSI circuits; LV low-power VLSI; adiabatic differential switch logic circuit; bootstrap technique; capacitance coupling effects; low-voltage VLSI; propagation delay time;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20021042
Filename
1106075
Link To Document