• DocumentCode
    872768
  • Title

    A FASTBUS Processor Interface Using a 68000 Microprocessor

  • Author

    Arai, Y. ; Murakami, T. ; Inoue, E. ; Karita, Y. ; Endo, I. ; Shimokoshi, F.

  • Author_Institution
    KEK, National Laboratory for High Energy Physics Oho-Machi, Tsukuba-Gun, Ibaraki 305, Japan
  • Volume
    31
  • Issue
    1
  • fYear
    1984
  • Firstpage
    188
  • Lastpage
    192
  • Abstract
    A versatile FASTBUS master utilize a 68000 microprocessor has been developed. The module implements geographical, logical and broadcast addressing and is able to handle the FASTBUS Service Request. The data transfer rate is about 800 kB/sec by using window driver. The logics and test results are described.
  • Keywords
    Broadcasting; Computer interfaces; Fastbus; Laboratories; Logic testing; Microprocessors; Physics; Protocols; Prototypes; Registers;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1984.4333242
  • Filename
    4333242