DocumentCode
879732
Title
A Novel 4.5
Capacitorless Semiconductor Memory Device
Author
Wang, Peng-Fei ; Gong, Yi
Author_Institution
Oriental Semicond. Technol. Co., Ltd., Shanghai
Volume
29
Issue
12
fYear
2008
Firstpage
1347
Lastpage
1348
Abstract
This letter proposes a novel 4.5F2 capacitorless dynamic random access memory cell with a floating gate (FG) connected to drain via a gated p-n junction diode. The FG in the proposed memory device is for charge storage and can electrically be charged or discharged by current flowing through a gated p-n junction diode.
Keywords
DRAM chips; memory architecture; semiconductor devices; capacitorless dynamic random access memory cell; capacitorless semiconductor memory device; charge storage; floating gate; Capacitorless dynamic random access memory (DRAM); MOSFET; floating-body cell;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2008.2005740
Filename
4637839
Link To Document