Using a system-level bit-error-rate model to predict on-orbit performance

Author

Cosgrove, Michael A.

Author_Institution

Eastman Kodak Co., Rochester, NY, USA

Volume

50

Issue

6

fYear

2003

Firstpage

2352

Lastpage

2357

Abstract

Component single-event upset (SEU) rates are used to model and predict system bit-error rate (BER) performance in trade and specification verification analyses. Simplifying trade studies involving component cost, delivery-time reductions, and part substitution effects are important benefits.

Keywords

SRAM chips; application specific integrated circuits; digital signal processing chips; error statistics; field programmable gate arrays; radiation hardening (electronics); space vehicle electronics; system buses; ASIC input buffer controllers; MIL-STD-1553B serial bus interface; clock logic; complete spacecraft system; component cost; component single-event upset rates; component trades; delivery-time reductions; design trades; digital image processing subsystem; digital imaging system; ionizing radiation; on-orbit performance; output buffer SRAM; part substitution effects; radiation-effects prediction model; single-event functional interrupts; soft-error rate; specification verification analyses; system-level bit-error-rate model; Bit error rate; Circuit testing; Costs; Digital cameras; Digital signal processing; Ionizing radiation; Performance analysis; Predictive models; Radiation effects; Single event upset;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2003.821376

Filename

1263884