Processing technology and AC/DC characteristics of linear compatible I/sup 2/L

Author

Saltich, Jack L. ; George, William L. ; Soderberg, John G.

Volume

11

Issue

4

fYear

1976

Firstpage

478

Lastpage

485

Abstract

The processing, a.c. and d.c. characteristics of I/SUP 2/L structures integrated with common analog circuit elements are studied. Since the required breakdown voltage of the analog circuitry normally dictates the resistivity and thickness of the silicon epitaxial layer, the authors studied the parametric performance of the I/SUP 2/L structure for common linear circuit voltages. Design criteria, processing, and device performance are presented for I/SUP 2/L structures built on several different types of material. The I/SUP 2/L performance achieved in the linear compatible technology easily allowed a fan-out of four and gate propagation delay less than 50 ns with standard device breakdowns of 20 V; but fan-out is limited to three and gate delay to 100 ns for the process which attained 30-V breakdowns.

Keywords

Digital integrated circuits; Integrated circuit production; Monolithic integrated circuits; digital integrated circuits; integrated circuit production; monolithic integrated circuits; Analog circuits; Conductivity; Electric breakdown; Fabrication; Integrated circuit technology; Linear circuits; Performance gain; Propagation delay; Semiconductor epitaxial layers; Silicon;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1976.1050762

Filename

1050762