VMOS ROM

Author

Rodgers, T.J. ; Hiltpold, Randy ; Zimmer, Jerry W. ; Marr, George ; Trotter, James D.

Volume

11

Issue

5

fYear

1976

fDate

10/1/1976 12:00:00 AM

Firstpage

614

Lastpage

622

Abstract

A new v-groove MOS (VMOS) read-only memory (ROM) is presented. The static 16-kbit ROM operates from a single 5-V supply, features typical and worst case access times of 160 ns and 200 ns, respectively, and has a die size of 120×140 mil/SUP 2/ using 6-μm design rules. The purposes for fabricating the VMOS ROM are to demonstrate the large-scale integration (LSI) yield feasibility of the VMOS process, and to provide a vehicle for widely varying circuit and process experiments. It is estimated on the basis of experimental data that two new VMOS process techniques, called `linear´ and `self-aligned´ VMOS, will reduce the 16-kbit ROM die size to 100×120 mil/SUP 2/ (6-μm rules).

Keywords

Digital integrated circuits; Large scale integration; Monolithic integrated circuits; Read-only storage; Semiconductor storage devices; digital integrated circuits; large scale integration; monolithic integrated circuits; read-only storage; semiconductor storage devices; Anisotropic magnetoresistance; Circuit testing; Etching; Large scale integration; Legged locomotion; MOSFETs; Read only memory; Switches; Threshold voltage; Vehicles;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1976.1050789

Filename

1050789