• DocumentCode
    884529
  • Title

    A Graphical Interpretation of Realization of Symmetric Boolean Functions with Threshold Logic Elements

  • Author

    Sheng, C.L.

  • Author_Institution
    Dept. of Electrical Engineering, University of Ottawa, Ontario, Canada.
  • Issue
    1
  • fYear
    1965
  • Firstpage
    8
  • Lastpage
    18
  • Abstract
    A graphical interpretation of the realization of symmetric Boolean functions with threshold logic elements is presented, from which a systematic synthesis method is developed. Theoretically, symmetric functions of any number of variables can be realized. Examples are given to show that, practically, there is no difficulty at all in realizing symmetric Boolean functions of as many as thirty or forty variables. Some theorems related to graphical interpretation and realization are presented, and the lower and upper bounds of the number of threshold logic elements required for the realization of symmetric functions are also derived from the graphical point of view.
  • Keywords
    Boolean functions; Indexing; Information retrieval; Libraries; Logic; Network synthesis; Testing;
  • fLanguage
    English
  • Journal_Title
    Electronic Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0367-7508
  • Type

    jour

  • DOI
    10.1109/PGEC.1965.264028
  • Filename
    4038344