DocumentCode
885676
Title
Properties of Be-implanted planar GaAs p-n junctions
Author
Helix, Max J. ; Vaidyanathan, K.V. ; Streetman, Ben G.
Volume
13
Issue
4
fYear
1978
fDate
8/1/1978 12:00:00 AM
Firstpage
426
Lastpage
429
Abstract
The fabrication and characteristics of planar junctions in GaAs formed by Be ion implantation are discussed. The critical processing step is shown to be the use of a carefully deposited oxygen-free Si/SUB 3/N/SUB 4/ encapsulation during post-implantation annealing. Forward and reverse characteristics are presented for Be-implanted junctions formed by encapsulating with SiO/SUB 2/, Si/SUB x/O/SUB y/N/SUB z/, or Si/SUB 3/N/SUB 4/ layers prior to annealing at 900°C. Junctions which exhibit leakage current density of ~2×10/SUP -7/ A/cm/SUP 2/ at 80 V reverse bias and breakdown voltage >200 V have been fabricated using RF-plasma deposited Si/SUB 3/N/SUB 4/ layers as the encapsulant.
Keywords
Beryllium; Gallium arsenide; III-V semiconductors; Integrated circuit technology; Ion implantation; beryllium; gallium arsenide; integrated circuit technology; ion implantation; p-n homojunctions; Annealing; Dielectric substrates; Encapsulation; Fabrication; Forward contracts; Gallium arsenide; Impurities; Ion implantation; Leakage current; P-n junctions;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1978.1051072
Filename
1051072
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