Loop decoder for Josephson memory arrays

A detailed theoretical and experimental investigation is presented concerning a novel so-called "loop decoder" using Josephson interferometers as the active elements. Successful operation of a DC powered, full 3-bit decoder is demonstrated with large operating margins. Addressing time is measured to be 180 ps and decoding time per stage is measured to be 30 ps. Excellent agreement is obtained between the experiments and computer simulations, thus establishing that present Josephson circuit models are reasonably accurate and well understood.