A 4-mW monolithic CMOS LNA at 5.7GHz with the gate resistance used for input matching

Author

Asgaran, Saman ; Deen, M. Jamal ; Chen, Chih-Hung

Author_Institution

Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, Ont., Canada

Volume

16

Issue

4

fYear

2006

fDate

4/1/2006 12:00:00 AM

Firstpage

188

Lastpage

190

Abstract

Design and measured results of a fully integrated 5.7-GHz CMOS low-noise amplifier (LNA) is presented. To design this LNA, the parasitic input resistance of a metal-oxide-semiconductor field-effect transistor (MOSFET) is converted to 50Ω by a simple L-C network, hence eliminating the need for source degeneration. It is shown, by means of compact expressions, that this matching method enhances the effective transconductance of the LNA by a factor that is inversely proportional to a MOSFET´s input resistance. The effect of our proposed method on the noise figure (NF) of the LNA is also discussed. With an 11.45-dB power gain and a 3.4-dB NF at 4mW of dc power, the presented LNA achieves the best overall performance when compared with the most recently published LNAs.

Keywords

CMOS analogue integrated circuits; MMIC amplifiers; low noise amplifiers; 11.45 dB; 3.4 dB; 4 mW; 5.7 GHz; 50 ohm; CMOS low-noise amplifier; L-C network; MOSFET input resistance; gate resistance; input matching; metal-oxide-semiconductor field-effect transistor; monolithic CMOS LNA; noise figure; parasitic input resistance; power gain; Frequency; Impedance matching; Inductors; Low-noise amplifiers; MOSFET circuits; Noise figure; Noise measurement; Performance gain; Silicon on insulator technology; Transconductance; CMOS; effective transconductance; inductive degeneration; input matching; low-noise amplifier;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2006.872128

Filename

1613891