DocumentCode
889880
Title
A Nonbulk Addition Technique for Associative Processors
Author
Yau, S.S. ; Yang, C.C.
Author_Institution
Information-Processing and Control Systems Laboratory and Department of Electrical Engineering, Northwestern University, Evanston, Ill.
Issue
6
fYear
1966
Firstpage
938
Lastpage
941
Abstract
A process is described for continuing adaptation, after hyperplanes that separate pattern classes in pattern space have been found, in order to increase the distance between sample patterns and hyperplanes.
Keywords
Arithmetic; Associative memory; Boolean functions; Hardware; Logic; Network synthesis; Silicon carbide; Software performance; Sufficient conditions; Testing;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1966.264483
Filename
4038944
Link To Document