DocumentCode
890959
Title
High-Speed Plated-Wire Memory System
Author
Waaben, Sigurd
Author_Institution
Bell Telephone Laboratories, Inc., Murray Hill, N. J.
Issue
3
fYear
1967
fDate
6/1/1967 12:00:00 AM
Firstpage
335
Lastpage
343
Abstract
The plated-wire memory, combined with functional circuit integration, is a strong contender for economic, high-speed, large-capacity memory systems. Important attributes of the plated-wire memory are high-speed DRO and NDRO capability, low digit WRITE current, high output sense signal and low word-to-digit line crosspoint capacitance. Design and operational results for a 1024-word by 80-bit store model are reported in detail. Utilizing a transformerless diode matrix for high-speed word selection, an access time of 75 ns and a READ-WRITE cycle time of 150 ns have been realized.
Keywords
Capacitance; Coupling circuits; Decoding; Light emitting diodes; Magnetic materials; Rails; Switches; Switching circuits; Timing; Wire; Digital store technology; diode access; high speed; plated-wire memory; random access;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1967.264691
Filename
4039073
Link To Document