DocumentCode
892700
Title
PLA versus bit slice: comparison for a 32 bit ALU
Author
Soutschek, E. ; Pomper, M. ; Horninger, K.
Volume
17
Issue
3
fYear
1982
fDate
6/1/1982 12:00:00 AM
Firstpage
584
Lastpage
586
Abstract
The PLA technique and the slice technique have been chosen to build a 32 bit wide ALU. Both techniques have a high degree of regularity and are used to soften the design time of complex logic circuits. In a given technology, the PLA is approximately twice as fast as the bit-slice solution (22-35 ns), but also needs more area (4.2-1 mm/SUP 2/).
Keywords
Field effect integrated circuits; Integrated logic circuits; field effect integrated circuits; integrated logic circuits; Circuit testing; Delay effects; Driver circuits; Equations; Feedback loop; Logic arrays; Logic circuits; Logic programming; Programmable logic arrays; Read only memory;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1982.1051778
Filename
1051778
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