The Effects of Test Conditions on MOS Radiation-Hardness Results

It is well known that the bias value applied between the gate and substrate can have a significant effect on the threshold voltage shift of MOS transistors under gamma irradiation. However, not so well known are the facts that the bias configuration of the source and drain during the irradiation also can have a significant effect on the threshold voltage shift measured, as can the bias condition applied between the times of irradiation and threshold voltage measurements. An alternating bias (between "ON" and "OFF" states) applied to the gate during irradiation need not give threshold voltage shifts intermediate between those for the two DC bias conditions. In this paper, we present data demonstrating the importance of these effects and discuss their implications with regards to specifications and techniques for radiation-hardness testing.