• DocumentCode
    897981
  • Title

    A Wafer-Scale Digital Integrator Using Restructurable VSLI

  • Author

    Raffel, J.I. ; Anderson, A.H. ; Chapman, G.H. ; Konkle, K.H. ; Mathur, B. ; Soares, A.M. ; Wyatt, P.W.

  • Volume
    20
  • Issue
    1
  • fYear
    1985
  • Firstpage
    399
  • Lastpage
    406
  • Abstract
    Wafer-scale integration has been demonstrated by fabricating a digital integrator on a monolithic 20-cm/sup 2/ silicon chip, the first laser-restructured digital logic system. Large-area integration is accomplished by laser programming of metal interconnect for defect avoidance. This paper describes the technology for laser welding and cutting, the design methodology and CAD tools developed for wafer-scale integration, and the integrator itself.
  • Keywords
    CMOS integrated circuits; Cellular arrays; Circuit layout CAD; Digital arithmetic; Integrated circuit technology; Laser beam applications; Redundancy; Design automation; Design methodology; Dielectrics; Joining processes; Laser beam cutting; Optical device fabrication; Silicon; Wafer scale integration; Welding; Wiring;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1985.1052320
  • Filename
    1052320
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=897981