A model for MOS transistors

A model is presented for the operation of MOS transistors which is applicable to many power and short channel devices. This improved 1-dimensional charge control model allows for the effects of the mobility reduction due to the gate-channel field and to velocity saturation of the channel carriers under the high drainsource field. Experiments have verified the model for n and p channel devices. The high drain voltage ID/VG data are compared with the model predictions using accepted experimental values of the bulk saturation velocity and velocity-field curves together with experimental measurements of the channel series resistance and the gate-field reduction of the mobility.