• DocumentCode
    911634
  • Title

    Synchronization of fault-tolerant clocks in the presence of malicious failures

  • Author

    Vasanthavada, Nagesh ; Marinos, Peter N.

  • Author_Institution
    Res. Triangle Inst., Res. Triangle Park, NC, USA
  • Volume
    37
  • Issue
    4
  • fYear
    1988
  • fDate
    4/1/1988 12:00:00 AM
  • Firstpage
    440
  • Lastpage
    448
  • Abstract
    The problem of achieving global clock synchronization in fault-tolerant clocks by preventing so-called multiple cliques in the presence of malicious clock failures (i.e. clock failures that are perceived differently by different nonfaulty clocks) is addressed. A solution to the problem, referred to as the averaging rule, is developed, and its use is analytically justified using the notions of clock partitions and generalized clock partitions. Experimental characterization of the multiple cliques problem has been undertaken, and certain conditions that induce their occurrence in practical hardware implementation are identified. The effects of clock-receiver triggering variations and phase-detector operating range on the instantaneous frequencies of the clock modules are investigated. The efficacy of the averaging rule is established not only by analysis but also by means of simulations and experimentation with hardware clock implementations
  • Keywords
    clocks; fault tolerant computing; logic testing; synchronisation; averaging rule; clock partitions; clock-receiver triggering; fault-tolerant clocks; malicious failures; phase-detector operating range; simulations; synchronisation; Clocks; Control systems; Fault tolerance; Fault tolerant systems; Frequency synchronization; Hardware; Phase detection; Phase frequency detector; Real time systems; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.2188
  • Filename
    2188