• DocumentCode
    912373
  • Title

    Suppression of parasitic thick-field conduction mechanisms in silicon-gate m.o.s. integrated circuits

  • Author

    Richman, Paul

  • Author_Institution
    Solid State Data Sciences Corporation, Hauppauge, USA
  • Volume
    7
  • Issue
    1
  • fYear
    1971
  • Firstpage
    12
  • Lastpage
    13
  • Abstract
    In a silicon-gate m.o.s. integrated circuit, because of the presence of the additional polycrystalline-silicon interconnection layer, it is possible virtually to eliminate parasitic thick-field transistor action at certain critical points in the circuit by employing an earthed polycrystalline-silicon region as an electrostatic shield between metal and substrate.
  • Keywords
    integrated circuits; metal-insulator-semiconductor devices; metal-insulator-semiconductor structures; shielding; electrostatic shield between metal and substrate; polycrystalline silicon interconnection layer; silicon gate MOS integrated circuits; suppression parasitic thick field conduction mechanisms;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19710009
  • Filename
    4235113