DocumentCode
917442
Title
Elimination of mesa-sidewall gate leakage in InAlAs/InGaAs heterostructures by selective sidewall recessing
Author
Bahl, Sandeep R. ; del Alamo, Jesús A.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Volume
13
Issue
4
fYear
1992
fDate
4/1/1992 12:00:00 AM
Firstpage
195
Lastpage
197
Abstract
Conventional mesa isolation in InAlAs/InGaAs HFETs results in the gate coming in contact with the exposed channel at the mesa sidewall, forming a parasitic gate-leakage path. The authors propose a simple method of recessing the channel edge into the mesa sidewall using a succinic-acid-based selective etchant for InGaAs over InAlAs. SEM photographs confirm the recessing of the channel along the sidewall. Special heterostructure diodes, designed with varying amounts of mesa-sidewall/gate-metal overlap, were fabricated with and without the sidewall isolation step. Electrical measurements confirm the complete elimination of sidewall leakage. for both diodes and HFETs.<>
Keywords
III-V semiconductors; aluminium compounds; etching; field effect transistors; gallium arsenide; indium compounds; leakage currents; semiconductor diodes; semiconductor technology; HFETs; InAlAs-InGaAs; InGaAs; SEM photographs; heterostructure diodes; mesa sidewall gate leakage elimination; parasitic gate-leakage path; selective sidewall recessing; sidewall isolation step; succinic-acid-based selective etchant; Etching; Gate leakage; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; MODFETs; Metallization; Microwave measurements; Schottky diodes;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.145018
Filename
145018
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