Hybrid-orientation technology (HOT): opportunities and challenges

Author

Yang, Min ; Chan, Victor W.C. ; Chan, Kevin K. ; Shi, Leathen ; Fried, David M. ; Stathis, James H. ; Chou, Anthony I. ; Gusev, Evgeni ; Ott, John A. ; Burns, Lindsay E. ; Fischetti, Massimo V. ; Ieong, Meikei

Author_Institution

IBM Semicond. R&D Center Res. Div., T. J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

53

Issue

5

fYear

2006

fDate

5/1/2006 12:00:00 AM

Firstpage

965

Lastpage

978

Abstract

At the onset of innovative device structures intended to extend the roadmap for silicon CMOS, many techniques have been investigated to improve carrier mobility in silicon MOSFETs. A novel planar silicon CMOS structure, seeking optimized surface orientation, and hence carrier mobilities for both nFETs and pFETs, emerged. Hybrid-orientation technology provides nFETs on (100) surface orientation and pFETs on [110] surface orientation through wafer bonding and silicon selective epitaxy. The fabrication processes and device characteristics are reviewed in this paper.

Keywords

MOSFET; carrier mobility; elemental semiconductors; silicon; wafer bonding; Si; carrier mobility; hybrid-orientation technology; innovative device structures; nFET; pFET; silicon CMOS structure; silicon MOSFET; silicon selective epitaxy; surface orientation; wafer bonding; CMOS technology; Dielectric materials; Epitaxial growth; Fabrication; High K dielectric materials; Isolation technology; MOSFETs; Silicon; Substrates; Very large scale integration; MOSFET; Mobility; silicon; surface orientation;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2006.872693

Filename

1624676