DocumentCode
921556
Title
Reconfigurable computer architectures
Author
Mehra, S.K. ; Majithia, J.C.
Author_Institution
Worcester Polytechnic Institute, Department of Electrical Engineering, Worcester, USA
Volume
129
Issue
4
fYear
1982
fDate
7/1/1982 12:00:00 AM
Firstpage
156
Lastpage
164
Abstract
A survey of reconfigurable computer architectures is presented. This shows two distinct trends: data-flow architectures and dynamic architectures. If a broad classification of programs based on two kinds of parallelism in programs, i.e. instruction and data, is adopted, then a pooled-resource reconfigurable multiprocessor (PRRMP) system can be evolved. The salient features of such a system, including hardware and software aspects, are discussed in this paper.
Keywords
computer architecture; PRRMP; data-flow architectures; dynamic architectures; hardware; pooled-resource reconfigurable multi-processor; reconfigurable computer architectures; software aspects; survey;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
DOI
10.1049/ip-e.1982.0032
Filename
4645353
Link To Document