A new design of a fast barrel switch network

Author

Tharakan, G.M. ; Kang, S.M.

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA

Volume

27

Issue

2

fYear

1992

fDate

2/1/1992 12:00:00 AM

Firstpage

217

Lastpage

221

Abstract

A new implementation of the barrel switch with a speedup of 20-30% as compared to that of the prior barrel switch design is proposed in this paper. Domino CMOS is used to implement the design, which can shift or rotate 32-b data to the left or right by any number of bit positions between 0 and 31. The principles behind the design, timing and area comparisons, layout, simulation, and test results are presented. The area required for laying out the entire circuit was 4.2 mm×3.2 mm. The critical path delay of the circuit was 27.53 ns. This compares very favorably with the 62 ns that was reported by S. M. Kang (1987). A novel feature of the design is the reduction in the number of stages for shifting from six to four, resulting in a 30% increase in speed

Keywords

CMOS integrated circuits; integrated logic circuits; logic design; switching networks; 27.53 ns; 32 bit; PLA; barrel switch network; chip area estimation; critical path delay; domino CMOS technology; fast switch design; floorplan; layout; timing analysis; Capacitance; Data mining; Hardware; Logic circuits; Logic design; Multivalued logic; Switches; Testing; Timing; Wiring;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.127346

Filename

127346