• DocumentCode
    924825
  • Title

    Polymorphic processor arrays

  • Author

    Maresca, Massimo

  • Author_Institution
    Dipartimento di Inf. Sistemistica e Telematica, Genova Univ., Italy
  • Volume
    4
  • Issue
    5
  • fYear
    1993
  • fDate
    5/1/1993 12:00:00 AM
  • Firstpage
    490
  • Lastpage
    506
  • Abstract
    Polymorphic processor arrays (PPAs), two-dimensional mesh-connected arrays of processors in which each processor is equipped with a switch able to interconnect its four NEWS ports, are discussed. The main features of PPA are that it models a realistic class of parallel computers, it supports the definition of high level programming models, it supports virtual parallelism, and it supports low complexity algorithms in a number of application fields. Both the PPA computation model and the PPA programming model are presented. It is shown that the PPA computation model is realistic by relating it to the design of the polymorphic torus (PT) chip. It is also shown that the PPA programming model is scalable by demonstrating that any algorithm having O(p) complexity on a virtual PPA of size √m×√m, has O(k p) complexity on a PPA of size √n×√n, with m k n and k integers. Some application algorithms in the area of numerical analysis and graph processing are presented
  • Keywords
    computational complexity; multiprocessor interconnection networks; parallel architectures; parallel processing; PPA; PPA programming model; low complexity algorithms; mesh-connected arrays; parallel computers; polymorphic processor arrays; Application software; Computational modeling; Computer architecture; Concurrent computing; Hardware; Multiprocessor interconnection networks; Parallel programming; Switches; Very large scale integration; Wiring;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/71.224213
  • Filename
    224213