DocumentCode
925719
Title
Integer multiplication and division on the HP Precision Architecture
Author
Magenheimer, Daniel J. ; Peters, Liz ; Pettis, Karl W. ; Zuras, Dan
Author_Institution
Hewlett-Packard Co., Cupertino, CA, USA
Volume
37
Issue
8
fYear
1988
fDate
8/1/1988 12:00:00 AM
Firstpage
980
Lastpage
990
Abstract
In recent years, many architectural design efforts have focused on maximizing performance for frequently executed, simple instructions. The authors describe how a small set of primitive instructions combined with what is considered careful frequency analysis and clever programming allows the Hewlett-Packard (HP) Precision Architecture integer multiplication and division implementation to provide adequate performance at little or no hardware cost
Keywords
Hewlett Packard computers; computer architecture; digital arithmetic; HP Precision Architecture; Hewlett-Packard; frequency analysis; integer division; integer multiplication; performance; programming; Arithmetic; Computer aided instruction; Computer architecture; Costs; Encoding; Frequency conversion; Hardware; High level languages; Performance analysis; Reduced instruction set computing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.2248
Filename
2248
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