• DocumentCode
    928629
  • Title

    Modelling interconnect yield in reconfigurable circuits

  • Author

    Franzon, P.D.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
  • Volume
    25
  • Issue
    18
  • fYear
    1989
  • Firstpage
    1225
  • Lastpage
    1226
  • Abstract
    Reconfigurable interconnect is required to implement defect-tolerant circuits. The impact of this wiring on yield is usually either ignored or overstated. A method is presented that allows the determination of the yield impact of the interconnect in reconfigurable circuits through the expanded use of critical area parameters.
  • Keywords
    VLSI; circuit reliability; failure analysis; integrated circuit technology; redundancy; semiconductor device models; VLSI; critical area parameters; defect-tolerant circuits; interconnect faults; interconnect yield modelling; reconfigurable circuits;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19890821
  • Filename
    43485
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=928629