• DocumentCode
    934415
  • Title

    Elimination algorithm: a method for fault diagnosis in combinational circuits based on an effect-cause analysis

  • Author

    Solana, J.M. ; Michell, J.A. ; Bracho, S.

  • Author_Institution
    Universidad de Santander, Departamento de Electricidad y Electronica, Facultad de Ciencias, Santander, Spain
  • Volume
    133
  • Issue
    1
  • fYear
    1986
  • fDate
    1/1/1986 12:00:00 AM
  • Firstpage
    31
  • Lastpage
    44
  • Abstract
    In the paper we develop an approach to fault diagnosis in combinational circuits yielding a new method based on an effect-cause analysis. In our method the circuit under test N* is studied by using a description of its behaviour called the operation map. Depending on the set of tests applied, this description may allow the fault in N* to be detected before, and independently of, being located. The elimination of inputs in the operation map allows us to find the fault situations in N* (causes) which are compatible with the applied test and the obtained response (the effect). The method presented does not require a fault dictionary, fault enumeration or knowledge of the values expected in the fault-free circuit, and it makes possible applications such as obtaining faults not detected by a given test (including redundant faults), the identification of faults which cannot be modelled as stuck-at faults and other applications characteristic of this type of analysis.
  • Keywords
    combinatorial circuits; fault location; logic testing; applications characteristic; combinational circuits; effect-cause analysis; elimination algorithm; fault diagnosis; fault-free circuit; redundant faults; stuck-at faults;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings E
  • Publisher
    iet
  • ISSN
    0143-7062
  • Type

    jour

  • DOI
    10.1049/ip-e:19860003
  • Filename
    4646699