• DocumentCode
    934475
  • Title

    Built-in self-testing of VLSI circuits-getting errors to catch themselves

  • Author

    Das, Sunil R.

  • Author_Institution
    Dept. of Electr. Eng., Ottawa Univ., Ont., Canada
  • Volume
    10
  • Issue
    3
  • fYear
    1991
  • Firstpage
    23
  • Lastpage
    26
  • Abstract
    Built in-self-testing (BIST), a technique that generates test patterns and evaluates output responses inside the chip, is discussed. The generation of test patterns, which can be either exhaustive or random, is examined. Methods for output response evaluation are described. Implementation schemes and test evaluation are addressed.<>
  • Keywords
    VLSI; automatic testing; BIST; VLSI; VLSI circuits; built in self testing; exhaustive test patterns; output responses; random test patterns; test evaluation; test patterns generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Fabrication; Hardware; Linear feedback shift registers; Manufacturing processes; Test pattern generators; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Potentials, IEEE
  • Publisher
    ieee
  • ISSN
    0278-6648
  • Type

    jour

  • DOI
    10.1109/45.127641
  • Filename
    127641