• DocumentCode
    935019
  • Title

    The cost and performance tradeoffs of buffered memories

  • Author

    Pohm, Arthur V. ; Agrawal, Om P. ; Monroe, Ronald N.

  • Author_Institution
    Iowa State University, Ames, Iowa
  • Volume
    63
  • Issue
    8
  • fYear
    1975
  • Firstpage
    1129
  • Lastpage
    1135
  • Abstract
    An analysis of the performance enhancement achieved and the incremental costs accrued in buffering (using a cache memory) memory systems is made. Buffering is found to be cost-effective even for minicomputer memories. The study indicates that the flagged registered swap algorithm is superior to three other common algorithms used. It is shown that when jobs are switched, a substantial number of memory requests are required before the buffer fills and gives a high hit ratio. It is also shown that individuaIly buffered main-memory modules can be interleaved to achieve very high system performance.
  • Keywords
    Bandwidth; Cache memory; Costs; Hardware; Joining processes; Microcomputers; Performance analysis; Solid state circuits; System performance;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1975.9905
  • Filename
    1451835