Transformer inrush currents and their associated overvoltages in HVDC schemes

The paper describes a method of studying the inrush current associated with the energisation of a large transformer. The method has been used to examine the harmonic content of the inrush current in an HVDC convertor station and to show how this high level of harmonic current can cause overvoltages. The role played by the AC system impedance and damping is examined. An interesting conclusion is drawn from the results, which show that the conventional HVDC simulator which uses fixed inductors and resistors to represent the Thevenin equivalent impedance may give pessimistic overvoltages. These results illustrate the reason for the anomaly which has been found in comparing site results with design simulator studies.