DocumentCode
955800
Title
The mu VP 64-bit vector coprocessor: a new implementation of high-performance numerical computation
Author
Awaga, Makoto ; Takahashi, Hiromasa
Author_Institution
Fujitsu Ltd., Kawasaki, Japan
Volume
13
Issue
5
fYear
1993
Firstpage
24
Lastpage
36
Abstract
The architecture and design of the mu VP, a single-chip vector coprocessor developed to meet the needs of high-performance processors, are described. The mu VP is a supercomputer component implemented on a single large-scale-integrated (LSI) CMOS chip. With 206 MFLOPS single-precision and 106-MFLOPS double-precision performance at 50 MHz, the mu VP offers a rate almost equivalent to that typical minisupercomputers.<>
Keywords
CMOS integrated circuits; large scale integration; microprocessor chips; satellite computers; vector processor systems; 106 to 206 MFLOPS; 50 MHz; 64 bit; CMOS chip; LSI; high-performance numerical computation; mu VP 64-bit vector coprocessor; supercomputer component; Application software; CMOS technology; Computer architecture; Coprocessors; Large scale integration; Maintenance engineering; Open systems; Supercomputers; VLIW; Workstations;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/40.237999
Filename
237999
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