Calibration of Rent´s rule models for three-dimensional integrated circuits

Author

Das, Shamik ; Chandrakasan, Anantha P. ; Reif, Rafael

Author_Institution

Microsystems Technol. Labs., Massachusetts Inst. of Technol., Cambridge, MA, USA

Volume

12

Issue

4

fYear

2004

fDate

4/1/2004 12:00:00 AM

Firstpage

359

Lastpage

366

Abstract

In this paper, we determine the accuracy of Rahman´s interconnect prediction model for three-dimensional (3-D) integrated circuits. Utilizing this model, we calculate the wiring requirement for a set of benchmark standard-cell circuits. We then obtain placed and routed wirelength figures for these circuits using 3-D standard-cell placement and global-routing tools we have developed. We find that the Rahman model predicts wirelengths accurately (to within 20% of placement and of routing, on average), and suggest some areas for minor improvement to the model.

Keywords

VLSI; calibration; circuit layout CAD; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; logic partitioning; network routing; Rahman model; Rent´s rule models; benchmark standard-cell circuits; global-routing tools; model calibration; placed wirelength figures; routed wirelength figures; system-level interconnect prediction; three-dimensional integrated circuits; wafer-bonded structure; wiring requirement; Calibration; Copper; Integrated circuit interconnections; Integrated circuit modeling; Integrated circuit technology; Predictive models; Semiconductor device modeling; Silicon on insulator technology; Three-dimensional integrated circuits; Wafer bonding;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2004.825833

Filename

1288171