Effect of irradiation and annealing conditions on power transistor performance

It is shown that to simultaneously achieve requirements of dynamic (storage time) and static (on-resistance, peak drain current) power transistor characteristics, an irradiation/anneal processing cycle may be used. This includes annealing at a temperature range limited by the thermal stabilities of the A-centres and divacancies (i.e. 300-380°C). The irradiation flux by high energy electrons is chosen to accumulate the preassigned concentration of A-centres in the epilayer where transistors have been formed. This condition drives the choice towards high flux irradiation (fluxes above 10¹⁶cm^-2 ) for SIT power transistors. In addition, the irradiation/annealing process imposes constraints on impurity concentrations in the heavily doped drain (or collector) region and in the epilayer. The shallow donor impurity concentration must greatly exceed the oxygen concentration in the heavily doped region and the oxygen concentration must greatly exceed the carbon concentration in the epilayer