DocumentCode
967471
Title
A successive approximation register for analog-to-BCD conversion
Author
Yuen, C.K.
Author_Institution
University of Hong Kong, Hong Kong
Volume
70
Issue
11
fYear
1982
Firstpage
1365
Lastpage
1366
Abstract
It is shown that by adding a few OR gates to a previous design of the successive approximation register, we can use it in direct analog-to-BCD conversion.
Keywords
Application software; Approximation methods; Clocks; Computer applications; Displays; Hardware; Logic design; Resistors; Signal processing; Voltage;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1982.12487
Filename
1456755
Link To Document