Plasma Process Induced Device Degradation

A new plasma-induced device degradation for silicon gate FET devices is described, namely, a negative threshold voltage shift caused by plasma etching of plasma-enhanced chemical vapor deposited silicon nitride films. Negative VTshifts from hundreds of millivolts to more than 3 V occurred in N-channel devices of 45-nm gate oxide thickness whose gates were not tied to protect diodes or diffusions. The principal cause for the VTshift was the electrostatic potential developed across the device gate region during plasma etching. The proposed mechanism model is based on impact ionization in the gate oxide; i.e., electron/hole pairs are generated in the oxide from electrons accelerated from the silicon substrate during plasma etching. The resulting holes fill interface states and traps in the oxide causing negative VTshifts. Of the three preventative techniques given, the addition of a low-capacitance dielectric between the wafer and the etcher´s conductive electrode is believed to be an ideal solution.