DocumentCode
969566
Title
Interleaving Quasi-Sliding-Mode Control of Parallel-Connected Buck-Based Inverters
Author
Ramos, Rafael ; Biel, Domingo ; Fossas, Enric ; Guinjoan, Francisco
Author_Institution
Dept. of Electron. Eng., Univ. Politec. de Catalunya, Barcelona
Volume
55
Issue
11
fYear
2008
Firstpage
3865
Lastpage
3873
Abstract
An interleaving fixed-switching-frequency quasi-sliding control algorithm based on the zero average dynamics approach is reported and applied to the design of a modular system of parallel-connected single-phase inverters. This approach is used in a laboratory prototype of three inverters with field-programmable gate array control-based implementation embedding this algorithm, as well as a power management strategy for handling the number of active inverters. Experimental results are provided to illustrate the design features in terms of AC output voltage regulation, balanced current sharing among mismatched modules, interleaved fixed-switching-frequency operation and robustness with respect to load variations, and inverter activation during system operation.
Keywords
field programmable gate arrays; invertors; machine control; variable structure systems; AC output voltage regulation; active inverters; field-programmable gate array control-based implementation; interleaved fixed-switching-frequency operation; interleaving quasi-sliding-mode control; parallel-connected buck-based inverters; power management strategy; single-phase inverters; zero average dynamics approach; Algorithm design and analysis; Control systems; Energy management; Field programmable gate arrays; Interleaved codes; Inverters; Laboratories; Power system management; Prototypes; Voltage control; Field-programmable gate array (FPGA); interleaving operation; modular inverter system; zero average dynamics (ZAD) quasi-sliding control algorithm;
fLanguage
English
Journal_Title
Industrial Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0278-0046
Type
jour
DOI
10.1109/TIE.2008.2006016
Filename
4663176
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