Reliability of Metallized Ceramic/Polyimide Substrates

A new packaging technology has been developed to allow increased switching speeds, lower noise levels, and increased circuit density. The package consists of a ceramic substrate with two layers of copper circuitry separated by a polyimide layer. Extensive accelerated stress testing was performed on the chip carrier to determine the reliability exposures. We found no dielectric or interlayer failures after 2000 h at 85°C/80 percent relative humidity (RH). Almost no detectable resistance drift was observed in the interlayer connections. It was concluded that the polyimide chip carrier is very stable and will meet or exceed all design objectives.