The performance of bubble circuit functions at an 8 µm period

We present data on the performance of swap-replicate gates and other memory elements at an 8μm period. The devices are fabricated using a planar process to avoid permalloy step coverage problems, and have a 1μm minimum feature size. Good overall margins using sine wave drive fields in the 40-45 oersted range can be obtained by using a planar process, and scaling down permalloy gaps and permalloy-to-garnet spacing from values used at larger periods. The use of swap-replicate gates to connect minor loops to an input/output track permits a simplified architecture and a reduced number of electrical connections to the bubble device.