DocumentCode
976501
Title
Chopper stabilised ΠΔΣ analogue to digital conversion
Author
Kong, S.K. ; Ku, W.H.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA
Volume
32
Issue
12
fYear
1996
fDate
6/6/1996 12:00:00 AM
Firstpage
1052
Lastpage
1054
Abstract
A chopper stabilised ΠΔΣ ADC architecture is proposed. A chopper stabilised version of ΠΔΣ ADC, which has identical performances to the regular ΠΔΣ ADC but is immune to low frequency noises such as DC offsets, can be obtained without adding hardware complexities
Keywords
choppers (circuits); circuit noise; sigma-delta modulation; ΠΔΣ analogue-digital conversion; DC offsets; LF noise immunity; chopper stabilised ADC architecture; delta-sigma ADC;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19960753
Filename
502845
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