A subnanosecond clock Josephson 4-bit processor

Author

Kotani, Seigo ; Imamura, Takeshi ; Hasuo, Shinya

Author_Institution

Fujitsu Ltd., Atsugi, Japan

Volume

25

Issue

1

fYear

1990

fDate

2/1/1990 12:00:00 AM

Firstpage

117

Lastpage

124

Abstract

A Josephson 4-b processor with a 4-bit slice microprocessor, a 4-b multiplier, a 12-b accumulator, an 8-kb ROM, and a sequencer is described. The chip was fabricated with 1.5-μm all-niobium technology, and contains 24000 Nb/AlO_x/Nb Josephson junctions. The processor was designed using a bit slice structure and a simple ripple-carry method, and it has a data sequence based on a three-stage pipeline. Experiments confirmed that the processor functions operated correctly. The critical path measurements for each stage show that the ROM has a 100-ps access time, the microprocessor can be clocked at 1.1 GHz, and the multiplier has a 200-ps multiplication time. The power dissipation of the chip was 6.1 mW

Keywords

bit-slice computers; large scale integration; microprocessor chips; superconducting junction devices; superconducting logic circuits; superconducting memory circuits; 1.1 GHz; 1.5 micron; 100 ps; 200 ps; 4 bit; 6.1 mW; 8 kbit; Josephson 4-bit processor; Josephson junctions; Nb-AlO_x-Nb junctions; ROM; access time; accumulator; bit slice microprocessor; bit slice structure; critical path measurements; data sequence; modified variable threshold logic; multiplication time; multiplier; power dissipation; ripple-carry method; sequencer; subnanosecond clock; three-stage pipeline; Clocks; Josephson junctions; Microprocessors; Niobium; Pipelines; Power dissipation; Process design; Read only memory; Semiconductor device measurement; Time measurement;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.50293

Filename

50293