Advanced CMOS technology portfolio for RF IC applications

Author

Chang, Chih-Sheng ; Chao, Chih-Ping ; Chern, John G J ; Sun, Jack Yuan-Chen

Author_Institution

Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan

Volume

52

Issue

7

fYear

2005

fDate

7/1/2005 12:00:00 AM

Firstpage

1324

Lastpage

1334

Abstract

A high quality 90-nm CMOS-based technology portfolio suitable for various RF IC applications is presented. The portfolio is built up by a wide selection of active and passive components and a user-friendly process design kit (PDK). Layout-optimized RF components are studied in details including state-of-the-art 90 nm RFMOS devices with 120-160 GHz f_T and very low noise figures, varactors with tradeoff between quality factor and tuning ratio, precision capacitors with metal-insulator-metal and metal-over-metal schemes, and a variety of inductor structures suitable for different RF designs. The effectiveness for isolating substrate RF noise is also compared among several layout schemes. Finally the guidelines and requirements for constructing a useful PDK are addressed.

Keywords

CMOS integrated circuits; MIS devices; integrated circuit layout; integrated circuit noise; integrated circuit technology; process design; radiofrequency integrated circuits; 120 to 160 GHz; 90 nm; CMOS technology; RF design; RF noise; RFIC application; RFMOS device; active components; metal-insulator-metal scheme; metal-over-metal scheme; noise figures; passive components; precision capacitor; process design kit; quality factor; varactors; Application specific integrated circuits; CMOS integrated circuits; CMOS technology; Metal-insulator structures; Noise figure; Portfolios; Process design; Radio frequency; Radiofrequency integrated circuits; Varactors; Foundry; RF CMOS; RF IC;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2005.850631

Filename

1459089