Energy Consumption in Digital Optical ICs With Plasmon Waveguide Interconnects

Author

Tucker, Rodney S.

Author_Institution

Univ. of Melbourne, Melbourne

Volume

19

Issue

24

fYear

2007

Firstpage

2036

Lastpage

2038

Abstract

Limits on energy consumption in digital optical integrated circuits (ICs) using conventional and plasmon waveguide interconnects are presented. The maximum allowable on-chip power density imposes a lower limit on the spacing between devices and together with clock skew imposes an upper limit on the clock frequency. Optical ICs with low-loss plasmon waveguide interconnects may become viable if plasmon waveguide losses in the range 0.1-0.01 dB/m can be achieved.

Keywords

digital integrated circuits; integrated circuit interconnections; integrated optoelectronics; optical interconnections; optical waveguides; plasmons; clock frequency; clock skew; digital optical integrated circuits; energy consumption; low-loss plasmon waveguide interconnects; on-chip power density; Clocks; Digital integrated circuits; Energy consumption; Frequency; Integrated circuit interconnections; Integrated optics; Optical interconnections; Optical waveguides; Photonic integrated circuits; Plasmons; Complementary metal–oxide–semiconductor integrated circuits (CMOS ICs); energy per bit; optical integrated circuits (ICs); plasmon waveguides;

fLanguage

English

Journal_Title

Photonics Technology Letters, IEEE

Publisher

ieee

ISSN

1041-1135

Type

jour

DOI

10.1109/LPT.2007.909629

Filename

4390079