DocumentCode
995440
Title
Impact of design-manufacturing interface on SoC design methodologies
Author
Carballo, Juan-Antonio ; Nassif, Sani R.
Author_Institution
IBM Austin Res. Lab., TX, USA
Volume
21
Issue
3
fYear
2004
Firstpage
183
Lastpage
191
Abstract
Today´s semiconductor manufacturing trends are increasingly influencing hardware design techniques, tools, and methodologies. We analyze these trends and describe their effects on design methodologies. These effects clearly include impacts on yield optimization resolution enhancement.
Keywords
design for manufacture; integrated circuit layout; integrated circuit manufacture; integrated circuit reliability; system-on-chip; design for manufacture; design-manufacturing interface; integrated circuit reliability; integrated circuit yield optimization; semiconductor manufacture; system-on-chip design; Computer aided manufacturing; Computer integrated manufacturing; Data mining; Design for manufacture; Design methodology; Logic testing; Manufacturing industries; Packaging; Semiconductor device manufacture; Software design;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2004.13
Filename
1302084
Link To Document