Teradyne´s J967 VLSI Test System: Getting VLSI to the Market on Time

The J967 is the newest of Teradyne´s J900 series of VLSI test systems. It provides flxible timing and formating; fact accurate parametric tests; and automatic calibration to devices with fewer than 200 leads and bus speeds of up to 20 MHz. The 36 timing generators and 1024 timing sets reduce the need for multiple passes or multiple programs to test a device. The J967´s intergrated software includes the Berkeley 4.2BSD Unix operating system, T900 test language, automatic data loging, a test analysis program, and Testsim, a software simulation of the J967 for offline debuging.