Background calibration of operational amplifier gain error in pipelined A/D converters

New techniques for the calibration of interstage amplifier gain errors due to the finite gain of the operational amplifiers in pipelined analog-to-digital (A/D) converters are described. The techniques work by deriving an error signal from the summing node voltage of an operational amplifier to be calibrated and adding the processed error signal to the original signal in the analog or digital domain. The calibration is done entirely in the background, without interrupting the operation of the converter. Behavioral and transistor-level simulation results demonstrate the effectiveness of the proposed techniques in correcting the gain error and improving the accuracy and linearity of pipelined amplifiers and A/D converters.