An effective methodology for thermal characterization of electronic packaging

An effective and novel methodology that integrates infrared (IR) thermography measurement and a threedimensional (3-D) finite element (FE) model is proposed for thermal characterization of packages in a steady state under a natural convection environment based on JEDEC specification . To perform surface temperature measurement using an IR thermometer, a black paint coating is applied on the surface of packages so as to calibrate the surface radiation. The associated emissivity is approximately assessed using a simple calibration experiment, and an appropriate thickness of the coating is determined. By using a typical 100-lead Thin Quad Flat package (TQFP) as the test vehicle, the proposed methodology is benchmarked by a thermal test die measurement in terms of the junction-to-ambient (J/A) thermal resistance and the chip junction temperature. To demonstrate the accuracy of the benchmarked data from the thermal test die measurement, a corresponding uncertainty analysis is performed. It is found that the worst possible uncertainty in the measured power, based on the specific power supply, is about 0.005 W and that of chip junction temperature measurement is about 0.78 C. Additional studies are performed to evaluate the feasibility of the correlation models for convective heat transfer coefficients on typical TQFP packages. It turns out that for a small device such as the TQFP package, these correlation models are fairly reliable.